Christopher M. Priebe

I am a Ph.D. student in the Department of Computer Science and Engineering at the University of California San Diego. My research is an interplay of compilers, machine learning, and systems.

Graduate Student Researcher · email me

Education

2022 - Present

University of California San Diego

Doctor of Philosophy, Computer Engineering

  • Advisor: Hadi Esmaeilzadeh

2018 - 2022

Purdue University

Bachelor of Science, Electrical Engineering

  • Minor: Classical Studies
  • GPA: 3.94/4.0
  • Distinction: Graduated with Distinction (top 10% in the College of Engineering)

Experience

September 2022 - Present

University of California San Diego

Graduate Student Researcher

I am a member of the Alternative Computing Technologies (ACT) Laboratory led by Hadi Esmaeilzadeh working on compilers for cross-domain applications and multi-target compilation.

September 2025 - December 2025

AMD

Machine Learning Compilers Intern

Worked on compiler optimizations for matrix multiplication within the AMD backend of the Triton compiler.

May 2022 - August 2022

Intel

Graduate Technical Intern - Pre-Silicon Validation

I implemented formal verification properties in SystemVerilog to ensure the correctness of a finite state machine (FSM). Additionally, I developed Python scripts to automate waveform organization by parsing regression logs and collecting relevant signals related to failures, streamlining the debugging process for engineers.

May 2021 - July 2021

Intel

Undergraduate Technical Intern - Pre-Silicon Validation

I wrote directed tests and checkers in SystemVerilog to verify a specific IP’s compliance with architectural specifications. Additionally, I learned and applied software development practices such as test-driven development and clean coding to write maintainable and robust code.

May 2020 - August 2020

Naval Surface Warfare Center, Crane Division

Student Trainee

I designed and implemented an I2C slave device in Verilog. I researched the I2C protocol to understand the requirements, created block diagrams for each module, and implemented the design in Verilog. I also completed basic training modules in areas such as SystemVerilog, UVM, and functional verification.